September 12, 2006
Via Supercomputing Online:
Finally some good news so that we can all forget about the TOR-craze for a moment. Supercomputing Online reports that IBM announced today the availability of the IBM BladeCenter QS20, a Cell Broadband Engine based addition to existing IBM infrastructure:
“The IBM BladeCenter QS20 is a Cell BE-based blade system designed for businesses that can benefit from high performance computing power and the unique capabilities of the Cell BE processor to run graphic-intensive applications and is especially suitable for computationally intense, high performance workloads across a number of industries including digital media, medical imaging, aerospace, defense and communications.
The IBM BladeCenter QS20 extends and deepens IBM Power Architecture technology and is complementary to our existing rack-optimized and blade server products based on Intel Xeon, AMD Opteron, and IBM POWER processors.”
One double-wide blade holds two Cell BE processors running at 3.2 GHz and is to be seen as an extension to IBM’s System Cluster 1350. The datasheet mentions 1 GB of RAM (512 MB per processor – does that mean that both CPUs work individually rather than in SMP? I think it’s just an irritating fact in the data-sheet), a 40-GB harddrive, two Gigabit-Ethernet NICs. As an option 1 or 2 InfiniBand 4x adaptors can be connected via PCI-Express. The blade runs Fedora Core 5-based Linux for Cell.
OK, so much for the details, now let’s fire up the mighty oracle-mode: Is that possibly the hardware-basis for the Los Alamos Roadrunner supercomputer we’re all speculating about? Would that possibly mean that the mentioned CBEs of Roadrunner aren’t tightly integrated Co-processors to the Opteron-CPUs? Are they just going to deploy a 1350 together with a bunch of QS20 and wire them up via InfiniBand and Gigabit-Ethernet?
Now that would be cheap and kinda disappointed, wouldn’t it…? And i lose a fiver. Ah, I’m not. Nobody accepted the bet :-) Know more? Are you one of the lucky ones who already deployed a QS20? Tell me! Or use the fancy comment-function.
September 11, 2006
There’s now a bit more information available about Roadrunner, the new supercomputer for the Los Alamos National Laboratories. We remember, AMD and IBM were fighting for months to get the contract, with a surprising result in the end: Opterons and Cell Broadband Engine (based on IBM’s Power CPU) will be used to build a hybrid supercomputer.
IBM released a bit more information (that was already five days ago, it somehow sneaked under my radar). First of all, IBM won the bid. Second, Roadrunner is supposed to have a peak-performance of 1.6 Peta-FLOPS:
The machine is to be built entirely from commercially available hardware and based on the Linux® operating system. IBM® System x™ 3755 servers based on AMD Opteron technology will be deployed in conjunction with IBM BladeCenter® H systems with Cell B.E. technology. Each system used is designed specifically for high performance implementations.
Designed also with space and power consumption issues in mind, the system will employ advanced cooling and power management technologies and will occupy only 12,000 square feet of floor space, or approximately the size of three basketball courts.
That was basically everything, no word on how the Opterons should be connected, so we’re all still waiting for more on this topic. I still bet a fiver that they’ll use HyperTransport; AMD and IBM are both members of the HyperTransport Consortium.
September 6, 2006
Via Heise Newsticker, El Reg:
The Register claims that IBM proposes a new concept for Los Alamos’ new upcoming supercomputer, code-named “Roadrunner”. Both companies are bidding on the project for months, so this solution would be, well, at least very interesting. El Reg writes:
The lab will announce that IBM will build Roadrunner using a hybrid design that makes use of Opteron and Cell systems, according to a report from online rag CNET. The publication cites “sources familiar with the machine” as claiming that the National Nuclear Security Administration (NNSA), which oversees LANL, will reveal IBM’s win “in the coming days.”
So The Reg is quoting CNET, but not giving any pointers, couldn’t find the source yet, so… I file this under “rumours” :)
There was no word yet about how the Cell– and Opteron-CPUs should be integrated; I bet a fiver that they’re going to use HyperTransport and install a Cell-CPU as a Co-processor to the Opterons – probably similar to the technology DRC Computer is using for their Virtex-FPGA integration-solution.
If not, what else would be possible? PCI-Express, for sure, but probably too expensive on a large scale. Ideas, do you know more than Big Reg? Tell me! Or use the fancy comment-function.
August 6, 2006
Via El Reg:
Since the annoucement that IBM will sell off Opteron-server a couple of days ago there were only little details available; now IBM annouced some details and they’re quite juicy: Three Opteron-server models will have HTX-slots.
The whole HTX-concept is really cool: You can plugin accelerator-boards or co-processors directly into AMD’s Hyper Transport Bus which enables direct communication with the CPU and Memory without going through a Memory Controller Hub or Northbridge. The latency is much lower as traditional connection-technologies like PCI-X.
Cray uses a similar approach with their SeaStar communication chip on the XT3 supercomputer.
Their Opteron-based XD1 has a latency of 1.7 us in the same cabinet from CPU-to-CPU, 2.0 us to remote cabinets – done by Hyper Transport.
This is going to be an interesting summer; HTX is the best invention since sliced bread imho.
ibm, hpc, opteron, hypertransport, low latency